A field programmable gate array based synchronization mechanism of analog and digital local oscillators in bandwidth-interleaved data acquisition systems.
A field programmable gate array based synchronization mechanism of analog and digital local oscillators in bandwidth-interleaved data acquisition systems.
复制标题
带宽交错数据采集系统中基于模拟和数字本地振荡器的现场可编程门阵列同步机制。
DOI：
10.1063/5.0039666
复制
发表时间：
2021-03
期刊：
影响因子：
--
通讯作者：
Maolin Lei
中科院分区：
文献类型：
--
作者：
Yu Zhao;Peng Ye;Kuojun Yang;Jie Meng;Maolin Lei
研究了带宽交错数据采集系统中模拟和数字本振之间的同步问题。详细分析了BI-DAQ中模拟和数字LO在不同采集帧间的随机同步相位差。利用BI-DAQ中模拟LO与采样时钟的同步关系，在现场可编程门阵列（FPGA）中实现了每帧采集中模拟LO与数字LO的同步，其中数字LO产生于采样时钟域。搭建了一个带宽为5.5 GHz、采样率为20 Gs/s的BI-DAQ平台，验证了该同步机制的有效性。在该平台上的实验结果表明，所提出的同步机制的有效性，它只消耗少量的触发器和查找表在FPGA中没有任何额外的硬件辅助。
This paper studies the synchronization between the analog and digital local oscillators (LOs) in bandwidth-interleaved (BI) data acquisition systems (DAQS). It gives a detailed analysis of the random synchronization phase difference between the analog and digital LOs in the BI-DAQS among different acquisition frames. Exploiting the synchrony relation between the analog LO and sampling clock of the BI-DAQS, the synchronization between analog and digital LOs, where the digital LO is generated in the sampling clock domain, in each acquisition frame is realized in the Field Programmable Gate Array (FPGA). A BI-DAQS platform with a 5.5 GHz bandwidth and 20 Gs/s sampling rate is built to validate the proposed synchronization mechanism. Experimental results in the platform show the efficacy of the proposed synchronization mechanism, which consumes only a small amount of the flip-flops and look-up tables in the FPGA without any additional hardware assistance.
DOI：
10.1109/tim.2013.2278564
发表时间：
2014-02-01
影响因子：
5.6
作者：
D'Arco, Mauro;Genovese, Mariangela;Vadursi, Michele
通讯作者：
Vadursi, Michele
DOI：
10.1109/tim.2020.3003381
发表时间：
2020-12
影响因子：
5.6
作者：
Jinpeng Song;Yu-Hen Hu;Jianping An
通讯作者：
Jinpeng Song;Yu-Hen Hu;Jianping An