Low ON-Resistance SiC Trench/Planar MOSFET With Reduced OFF-State Oxide Field and Low Gate Charges
Low ON-Resistance SiC Trench/Planar MOSFET With Reduced OFF-State Oxide Field and Low Gate Charges
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DOI：
10.1109/led.2016.2609599
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发表时间：
2016-11-01
影响因子：
4.9
通讯作者：
Chen, Kevin J.
中科院分区：
文献类型：
--
作者：
Wei, Jin;Zhang, Meng;Chen, Kevin J.
我们提出了一种SiC沟槽/平面MOSFET（TP-MOS），其特点是在一个半单元中的沟槽沟道和平面沟道。数值模拟与Sentaurus TCAD已经进行了研究所提出的器件架构。与传统的平面MOSFET（P-MOS）相比，TP-MOS由于沟道密度的增加，具有更低的罗恩比。与传统的沟槽MOSFET（T-MOS）不同，T-MOS在高电压关断状态下以高底部氧化物场为代价实现更高的沟道密度，TP-MOS具有与P-MOS中相同的底部p基极，其保护栅极氧化物免受高电场的影响。TP-MOS的截止态氧化物场甚至低于P-MOS。此外，TP-MOS具有低反馈电容（C-rss）和栅漏电荷（Q（GD）），因为栅极和漏极之间的耦合被顶部p基极和底部p基极的集体效应抑制。TP-MOS的Q（G）与P-MOS几乎相同，并且比T-MOS小得多。在TP-MOS中实现了上级的品质因数（Q（G）x R-ON和Q（GD）x R-ON）。
We propose a SiC trench/planar MOSFET (TP-MOS) which features a trench channel and a planar channel in one half-cell. Numerical simulations with Sentaurus TCAD have been carried out to study the proposed device architecture. Compared with traditional planar MOSFET (P-MOS), the TP-MOS has a much lower RON owing to the increased channel density. Unlike traditional trench MOSFET (T-MOS) which enables a higher channel density at the price of a high bottom-oxide field in the high-voltage OFF-state, the TP-MOS features bottom p-bases as in the P-MOS that protect the gate oxide from high electric field. The OFF-state oxide field in the TP-MOS is found to be even lower than the P-MOS. In addition, the TP-MOS boasts a low feedback capacitance (C-rss) and gateto- drain charge (Q(GD)), since the coupling between the gate and the drain is suppressed by the collective effects of the top p-bases and the bottom p-bases. The Q(G) of the TP-MOS is nearly the same as the P-MOS, and is much smaller than the T-MOS. Superior figures of merit (Q(G) x R-ON and Q(GD) x R-ON) are achieved in the TP-MOS.