Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems
Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems
复制标题
利用动态时序余量提高超低功耗嵌入式系统的能效
DOI：
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发表时间：
2016
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通讯作者：
J. Sartori
中科院分区：
文献类型：
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作者：
Hari Cherupalli;Rakesh Kumar;J. Sartori
许多新兴应用，如物联网、可穿戴设备和传感器网络，都有超低功耗要求。同时，考虑到成本和可编程性，这些应用程序中的许多将由通用嵌入式微处理器和微控制器提供支持，而不是asic。在本文中，我们利用了一个新的机会来提高超低功耗处理器的能源效率，有望推动这些应用——动态时序松弛。当在处理器上执行的嵌入式软件应用程序不执行处理器的静态关键路径时，就存在动态时序松弛。在这种情况下，应用程序运行的最长路径具有额外的时序松弛，可以通过在相同频率下降低处理器电压，直到最长路径刚好满足时序约束，从而在不增加性能成本的情况下节省电力。应用程序不能执行的路径可以被允许违反时间约束。我们表明，动态定时松弛存在于许多超低功耗应用程序中，并且利用动态定时松弛可以为任何超低功耗处理器带来显着的功耗节省。我们还提出了一种用于识别动态时序松弛和为处理器和特定嵌入式软件选择安全工作点的自动化方法。我们识别和利用动态时间空闲的方法是非推测性的，不需要程序员干预，很少或根本不需要硬件支持，并且在不降低性能成本的情况下，在一个普通超低功耗处理器上运行的一系列嵌入式应用程序中，可以节省高达32%，平均25%的电力。
Many emerging applications such as the internet of things, wearables, and sensor networks have ultra-low-power requirements. At the same time, cost and programmability considerations dictate that many of these applications will be powered by general purpose embedded microprocessors and microcontrollers, not ASICs. In this paper, we exploit a new opportunity for improving energy efficiency in ultralow-power processors expected to drive these applications -- dynamic timing slack. Dynamic timing slack exists when an embedded software application executed on a processor does not exercise the processor's static critical paths. In such scenarios, the longest path exercised by the application has additional timing slack which can be exploited for power savings at no performance cost by scaling down the processor's voltage at the same frequency until the longest exercised paths just meet timing constraints. Paths that cannot be exercised by an application can safely be allowed to violate timing constraints. We show that dynamic timing slack exists for many ultra-low-power applications and that exploiting dynamic timing slack can result in significant power savings for any ultra-low-power processors. We also present an automated methodology for identifying dynamic timing slack and selecting a safe operating point for a processor and a particular embedded software. Our approach for identifying and exploiting dynamic timing slack is non-speculative, requires no programmer intervention and little or no hardware support, and demonstrates potential power savings of up to 32%, 25% on average, over a range of embedded applications running on a common ultra-low-power processor, at no performance cost.