A Multi-Band Quadrature Clock Generator With High-Pass-Filtered Pulse Injection Technique
A Multi-Band Quadrature Clock Generator With High-Pass-Filtered Pulse Injection Technique
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DOI：
10.1109/lmwc.2013.2239634
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发表时间：
2013-01
影响因子：
3
通讯作者：
Sang-yeop Lee;Tatsuya Kamimura;S. Yonezawa;Atsushi Shirane;Shunsuke Ikeda;Hiroyuki Ito;Noboru Ishihara-Noboru-I
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文献类型：
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作者：
Sang-yeop Lee;Tatsuya Kamimura;S. Yonezawa;Atsushi Shirane;Shunsuke Ikeda;Hiroyuki Ito;Noboru Ishihara-Noboru-I
提出了一种高通滤波（HPF）脉冲注入技术，以减少注入锁定引起的载波信号附近的杂散。利用该技术，实现了一个由宽频率范围注入锁定锁相环和频率可选本地缓冲器组成的多频带正交时钟发生器。该时钟发生器采用65 nm CMOS工艺实现。对于100 MHz基准电压源，该电路可通过八相VCO和缓冲器输出1.0、2.0和4.0 GHz正交输出。在2.0 GHz时，该器件的1 MHz偏移相位噪声为-105 dBc/Hz，参考杂散电平为-50 dBc，启用HPF脉冲注入。在4GHz时，总功耗小于32 mW。
A high-pass-filtered (HPF) pulse injection technique is proposed to reduce spurs near the carrier signal due to injection locking. By using this technique, a multi-band quadrature clock generator consisting of a wide-frequency range injection-locked PLL and a frequency-selectable local buffer is demonstrated. The proposed clock generator was fabricated in a 65 nm CMOS. For a 100 MHz reference, the circuit can output 1.0, 2.0, and 4.0 GHz quadrature outputs with an eight-phase VCO and the buffer. It shows an 1 MHz-offset phase noise -105 dBc/Hz and a reference spur level of -50 dBc at 2.0 GHz, with enabling HPF pulse injection. The total power consumption is lower than 32 mW at 4 GHz.