Effects of annealing on pentacene field-effect transistors using polyimide gate dielectric layers

Effects of annealing on pentacene field-effect transistors using polyimide gate dielectric layers
复制标题

DOI:
10.1063/1.2216883
复制
发表时间:
2006-07
影响因子:
3.2
通讯作者:
T. Sekitani;T. Someya;T. Sakurai
T. Sekitani;T. Someya;T. Sakurai
中科院分区:
物理与天体物理3区
文献类型:
--
作者:
T. Sekitani;T. Someya;T. Sakurai

文献摘要

被引文献

相似文献

我们报告退火并五苯场效应晶体管(FET)的影响的系统研究。FET制造在具有聚酰亚胺栅极电介质层的塑料膜上,用聚氯对二甲苯(parylene)钝化层封装,并在不同衬底温度下在氮气环境中退火。退火的FET在160°C的测量温度下起作用,并且在经受室温和160°C之间的多次热循环之后,晶体管性能没有劣化。即使在VDS=VGS=− 40 V的直流偏置下,退火后的FET的源漏电流变化也小于5%。当在氮气环境中在140°C下退火12 h时,FET的迁移率从0.52增加到0.56cm 2 scinVs,并且开/关比也提高到106。
We report systematic studies on the effects of annealing on pentacene field-effect transistors (FETs). The FETs are fabricated on plastic films with polyimide gate dielectric layers, encapsulated with poly-chloro-para-xylylene (parylene) passivation layers, and annealed in a nitrogen environment at different substrate temperatures. The annealed FETs are functional at a measurement temperature of 160°C and exhibit no degradations in the transistor performance after being subjected to a number of heat cycles between room temperature and 160°C. The annealed FETs exhibit a change of less than 5% in the source-drain currents even after the application of dc voltage biases of VDS=VGS=−40V for 41h. When the FETs are annealed at 140°C for 12h in a nitrogen environment, the mobility increases from 0.52to0.56cm2∕Vs and the on/off ratio also improves to 106.