Time- and Frequency-Interleaving: Distinctions and Connections
Time- and Frequency-Interleaving: Distinctions and Connections
复制标题
时间和频率交织:区别和联系
DOI:
10.1109/tsp.2021.3074013
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发表时间:
2021-04
影响因子:
5.4
通讯作者:
Hu Yu-Hen
中科院分区:
文献类型:
--
作者:
Song Jinpeng;An Jianping;Bu Xiangyuan;Gao Xiang;Hu Yu-Hen
This paper connects the linear steady-state systematic error models of the time- and frequency-interleaved analog-to-digital converters (ADCs). Exposing their relations is of importance because estimation and compensation methods developed for one architecture may therefore apply to the other. Most critical impairments in both ADC structures include static mismatches and random jitter. The former has been well studied and can be generalized to the model connection, whereas not much is known regarding the latter. To support designers becoming more capable of making optimal design and architectural decisions on parallel ADCs, comprehensive phase noise analysis and comparison are carried out to reveal the distinctions between these two sampling architectures. Design examples with considerations are also provided for demonstration purposes.
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