Time- and Frequency-Interleaving: Distinctions and Connections

Time- and Frequency-Interleaving: Distinctions and Connections
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时间和频率交织:区别和联系

DOI:
10.1109/tsp.2021.3074013
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发表时间:
2021-04
影响因子:
5.4
通讯作者:
Hu Yu-Hen
Hu Yu-Hen
中科院分区:
工程技术1区
文献类型:
--
作者:
Song Jinpeng;An Jianping;Bu Xiangyuan;Gao Xiang;Hu Yu-Hen

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本文建立了时频交错模数转换器(adc)的线性稳态系统误差模型。暴露它们之间的关系非常重要,因为为一个体系结构开发的评估和补偿方法可能因此适用于另一个体系结构。这两种ADC结构的最关键缺陷包括静态不匹配和随机抖动。前者已经得到了很好的研究,可以推广到模型连接,而后者则知之甚少。为了支持设计人员更有能力对并行adc进行最佳设计和架构决策,进行了全面的相位噪声分析和比较,以揭示这两种采样架构之间的区别。为了演示目的,还提供了带有注意事项的设计示例。
This paper connects the linear steady-state systematic error models of the time- and frequency-interleaved analog-to-digital converters (ADCs). Exposing their relations is of importance because estimation and compensation methods developed for one architecture may therefore apply to the other. Most critical impairments in both ADC structures include static mismatches and random jitter. The former has been well studied and can be generalized to the model connection, whereas not much is known regarding the latter. To support designers becoming more capable of making optimal design and architectural decisions on parallel ADCs, comprehensive phase noise analysis and comparison are carried out to reveal the distinctions between these two sampling architectures. Design examples with considerations are also provided for demonstration purposes.
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