Accelerated FDPS: Algorithms to use accelerators with FDPS

Accelerated FDPS: Algorithms to use accelerators with FDPS
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加速 FDPS:使用 FDPS 加速器的算法

DOI:
10.1093/pasj/psz133
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发表时间:
2020
影响因子:
2.3
通讯作者:
Makino Junichiro
Makino Junichiro
中科院分区:
物理与天体物理4区
文献类型:
--
作者:
Iwasawa Masaki;Namekata Daisuke;Nitadori Keigo;Nomura Kentaro;Wang Long;Tsubouchi Miyuki;Makino Junichiro

文献摘要

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我们描述了在FDPS(开发粒子模拟器的框架)中实现的算法,以有效地利用加速器硬件,如GPGPU(图形处理单元上的通用计算)。我们开发了FDPS,使研究人员能够开发自己的高性能并行基于粒子的仿真程序,而无需花费大量的时间在并行化和性能调整。FDPS以“通用”形式为基于粒子的模拟提供了高性能的并行算法实现,以便研究人员可以定义自己的粒子数据结构和粒子间相互作用函数。使用用户提供的数据类型和交互函数编译的FDPS提供了并行化所需的所有功能,因此研究人员可以像编写简单的非并行代码一样编写程序。以前可以通过编写使用加速器的交互函数来将加速器与FDPS一起使用。然而,效率受到CPU和加速器之间通信的延迟和带宽的限制,并且还受到交互功能的可用并行度与硬件并行度之间的不匹配的限制。我们修改了用户提供的交互功能的界面,以便更有效地使用加速器。我们还实施了新技术,减少了CPU端的工作量以及CPU和加速器之间的通信量。我们已经测量了N体模拟的性能与NVIDIA Volta GPGPU使用FDPS的系统和实现的性能是理论峰值限制的27%左右。我们已经建立了一个详细的性能模型,并发现,目前的实现可以实现良好的性能在系统上具有更小的内存和通信带宽。因此,我们的实现将适用于未来几代的加速器系统。
We describe algorithms implemented in FDPS (Framework for Developing Particle Simulators) to make efficient use of accelerator hardware such as GPGPUs (general-purpose computing on graphics processing units). We have developed FDPS to make it possible for researchers to develop their own high-performance parallel particle-based simulation programs without spending large amounts of time on parallelization and performance tuning. FDPS provides a high-performance implementation of parallel algorithms for particle-based simulations in a “generic” form, so that researchers can define their own particle data structure and interparticle interaction functions. FDPS compiled with user-supplied data types and interaction functions provides all the necessary functions for parallelization, and researchers can thus write their programs as though they are writing simple non-parallel code. It has previously been possible to use accelerators with FDPS by writing an interaction function that uses the accelerator. However, the efficiency was limited by the latency and bandwidth of communication between the CPU and the accelerator, and also by the mismatch between the available degree of parallelism of the interaction function and that of the hardware parallelism. We have modified the interface of the user-provided interaction functions so that accelerators are more efficiently used. We also implemented new techniques which reduce the amount of work on the CPU side and the amount of communication between CPU and accelerators. We have measured the performance ofN-body simulations on a system with an NVIDIA Volta GPGPU using FDPS and the achieved performance is around 27% of the theoretical peak limit. We have constructed a detailed performance model, and found that the current implementation can achieve good performance on systems with much smaller memory and communication bandwidth. Thus, our implementation will be applicable to future generations of accelerator system.