Measurements and Analysis of Substrate Noise Coupling in TSV-Based 3-D Integrated Circuits
Measurements and Analysis of Substrate Noise Coupling in TSV-Based 3-D Integrated Circuits
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DOI：
10.1109/tcpmt.2014.2316150
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发表时间：
2014-04
期刊：
影响因子：
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通讯作者：
Y. Araga;M. Nagata;G. van der Plas;P. Marchal;M. Libois;A. la Manna;Wenqi Zhang;G. Beyer;E. Beyne
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文献类型：
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作者：
Y. Araga;M. Nagata;G. van der Plas;P. Marchal;M. Libois;A. la Manna;Wenqi Zhang;G. Beyer;E. Beyne
硅衬底可以在基于硅通孔（TSV）的3-D集成电路（IC）结构中的层之间策略性地隔离或统一，以分别用于抑制层间衬底噪声耦合或减小硅衬底作为整体的接地阻抗。一个两层的3-D集成电路演示在130纳米CMOS工艺成功地进行了测试和分析，相对于内部和层间的基板噪声耦合。堆栈中的每一层都包括数字噪声源电路（NS）和衬底噪声监视器，并体现了对衬底噪声耦合的就地测量。等效电路统一的电源和基板网络的层，并模拟基板噪声耦合的频域响应。在一个三维集成电路演示器中，基片噪声耦合的频率依赖性的测量和等效电路的计算是一致的。层内传播占主导地位，而层间耦合是微不足道的低频基板噪声分量。层间耦合变得与层内耦合相当，并且随着衬底噪声分量的频率增加而最终消除层内耦合。多层芯片堆叠中的衬底噪声耦合受到TSV的寄生电容的强烈影响，而该耦合变得可以通过整个堆叠的等效电路来预测。
Silicon substrates can be strategically isolated or unified among tiers in a through-silicon-via (TSV)-based 3-D integrated circuit (IC) structure, for the suppression of intertier substrate noise coupling or the reduction of grounding impedance of silicon substrates as a whole, respectively. A two-tier 3-D IC demonstrator in a 130-nm CMOS technology was successfully tested and analyzed with respect to intra and intertier substrate noise coupling. Each tier in the stack includes digital noise source circuits (NSs) and substrate noise monitors, and embodies in-place measurements of substrate noise coupling. An equivalent circuit unifies power and substrate networks of the tiers and simulates the frequency-domain response of substrate noise coupling. Measurements and calculation with the equivalent circuit are consistent for frequency dependency of substrate noise coupling in a 3-D IC demonstrator. Intratier propagation is dominant, while intertier coupling is insignificant for low-frequency substrate noise components. Intertier coupling becomes comparable with and finally overwhelms intratier coupling as the frequency of substrate noise components increases. Substrate noise coupling in a multitier chip stack is strongly impacted by the parasitic capacitance of TSVs, while that coupling becomes predictable with the equivalent circuit of the entire stack.