Parallel Hybrid Stochastic-Binary-Based Neural Network Accelerators

Parallel Hybrid Stochastic-Binary-Based Neural Network Accelerators
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基于随机二进制的并行混合神经网络加速器

DOI:
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发表时间:
2020
期刊:
IEEE Transactions on Circuits and Systems - II - Express Briefs
影响因子:
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通讯作者:
Ru Huang
Ru Huang
中科院分区:
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文献类型:
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作者:
Yawen Zhang;Runsheng Wang;Xinyue Zhang;Yuan Wang;Ru Huang

文献摘要

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以概率为媒介的随机计算由于硬件简单、容错能力强等优点,近年来在神经网络加速器领域得到了发展。然而,传统的基于SC的神经网络加速器采用比特连续计算,因此存在延迟高、随机波动和比特流数字生成器硬件成本高的问题。本文提出了一种新的并行混合随机-二进制神经网络(PHSB-NN)加速器结构,该结构控制并行温度计编码。文中还分别提出了并行比特流数字产生器和乘法累加(MAC)算法,能够在一个时钟周期内同步译码所有的比特流,并完成MAC运算。标准14 nm FinFET工艺的电路综合结果表明,与传统的基于SC的神经网络加速器相比,所提出的PHSB-NN加速器可以在不牺牲MNIST数据集的精度的情况下实现33.5百万美元的能效改进。
Stochastic computing (SC) adopting probability as the medium, has been recently developed in the field of neural network (NN) accelerator due to simple hardware and high fault tolerance. However, traditional SC-based NN accelerators employ the bit-serial computation, and thus suffer from high latencies, random fluctuations and high hardware costs of bitstream number generators. In this brief, a novel parallel hybrid stochastic-binary-based NN (PHSB-NN) accelerator architecture manipulating the parallel thermometer coding is proposed. Parallel bitstream number generator and multiply accumulate (MAC) are also proposed, respectively, which can synchronously decode all bitstreams and complete the MAC computation in only one clock cycle. Compared with traditional SC-based NN accelerators, the proposed PHSB-NN accelerators can achieve $33.5 imes $ energy efficiency improvement without sacrificing the accuracy on the MNIST dataset, as demonstrated in the circuit synthesis results of the standard 14-nm FinFET technology.