Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits

Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits
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用于调试算术电路中多个错误的自动测试生成

DOI:
10.1109/tc.2018.2868362
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发表时间:
2019
影响因子:
3.7
通讯作者:
P. Mishra
P. Mishra
中科院分区:
计算机科学2区
文献类型:
--
作者:
Farimah Farahmandi;P. Mishra

文献摘要

被引文献

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优化和定制运算电路广泛应用于嵌入式系统,如多媒体应用、密码系统、信号处理和控制台游戏。由于复杂性的增加以及非标准实现,算术电路的编程是一个挑战。现有的代数重写技术产生一个余数,以表明存在一个潜在的错误。然而,bug定位仍然是一个主要的瓶颈。由于位爆破,使用随机或约束随机测试的基于仿真的验证对于复杂的算术电路无效。在本文中,我们提出了一个自动测试生成和错误定位技术调试算术电路。本文作出了四个重要贡献。我们提出了一个自动化的方法,通过适当的输入变量的分配,使剩余的非零生成有向测试。生成的测试保证会激活bug。我们还提出了一个自动的错误修复技术,利用剩余条款的模式,以及通过分析所生成的测试激活的区域,以检测和纠正错误(S)。我们还提出了一个有效的调试算法,可以处理多个依赖以及独立的错误。最后,我们提出的框架,包括定向测试生成,错误定位和错误纠正,是完全自动化的。换句话说,我们的框架能够在没有任何人工干预的情况下产生算术电路的正确实现。我们的实验结果表明,所提出的方法可以用于大型和复杂的算术电路的自动调试。
Optimized and custom arithmetic circuits are widely used in embedded systems such as multimedia applications, cryptography systems, signal processing and console games. Debugging of arithmetic circuits is a challenge due to increasing complexity coupled with non-standard implementations. Existing algebraic rewriting techniques produce a remainder to indicate the presence of a potential bug. However, bug localization remains a major bottleneck. Simulation-based validation using random or constrained-random tests are not effective for complex arithmetic circuits due to bit-blasting. In this paper, we present an automated test generation and bug localization technique for debugging arithmetic circuits. This paper makes four important contributions. We propose an automated approach for generating directed tests by suitable assignments of input variables to make the remainder non-zero. The generated tests are guaranteed to activate bugs. We also propose an automatic bug fixing technique by utilizing the patterns of the remainder terms as well as by analyzing the regions activated by the generated tests to detect and correct the error(s). We also propose an efficient debugging algorithm that can handle multiple dependent as well as independent bugs. Finally, our proposed framework, consisting of directed test generation, bug localization and bug correction, is fully automated. In other words, our framework is capable of producing a corrected implementation of arithmetic circuits without any manual intervention. Our experimental results demonstrate that the proposed approach can be used for automated debugging of large and complex arithmetic circuits.