Single-Event Double-Upset Self-Recoverable and Single-Event Transient Pulse Filterable Latch Design for Low Power Applications
Single-Event Double-Upset Self-Recoverable and Single-Event Transient Pulse Filterable Latch Design for Low Power Applications
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DOI：
10.23919/date.2019.8714841
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发表时间：
2019-03
期刊：
影响因子：
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通讯作者：
Aibin Yan;Yuanjie Hu;Jie Song;X. Wen
中科院分区：
文献类型：
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作者：
Aibin Yan;Yuanjie Hu;Jie Song;X. Wen
本文提出了一种单粒子双翻转（SEDU）自恢复和单粒子瞬态（SET）脉冲滤波锁存器的设计，低功耗应用在22纳米CMOS工艺。该锁存器主要由8个相互反馈的C元件和一个施密特触发器组成。仿真结果表明，采用冗余硅区的锁存器具有SEDU自恢复能力和SET脉冲滤波能力。该锁存器采用门控时钟技术，与目前SEDU自恢复锁存器设计相比，平均节省功耗约54.85%，而SEDU自恢复锁存器设计完全不能对SET脉冲进行滤波。
This paper presents a single-event double-upset (SEDU) self-recoverable and single-event transient (SET) pulse filterable latch design for low power applications in 22nm CMOS technology. The latch mainly consists of eight mutually feeding back C-elements and a Schmitt trigger. Simulation results have demonstrated both the SEDU self-recoverability and SET pulse filterability for the latch using redundant silicon area. Using clock gating technology, the latch saves about 54.85% power dissipation on average compared with the up-to-date SEDU self-recoverable latch designs which are not SET pulse filterable at all.