Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels
Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels
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Kerncraft:循环内核分析性能建模工具
DOI:
10.1007/978-3-319-56702-0_1
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发表时间:
2017
期刊:
影响因子:
--
通讯作者:
G. Wellein
中科院分区:
文献类型:
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作者:
Julian Hammer;Jan Eitzinger;G. Hager;G. Wellein
Achieving optimal program performance requires deep insight into the interaction between hardware and software. For software developers without an in-depth background in computer architecture, understanding and fully utilizing modern architectures is close to impossible. Analytic loop performance modeling is a useful way to understand the relevant bottlenecks of code execution based on simple machine models. The Roofline Model and the Execution-Cache-Memory (ECM) model are proven approaches to performance modeling of loop nests. In comparison to the Roofline model, the ECM model can also describes the single-core performance and saturation behavior on a multicore chip.We give an introduction to the Roofline and ECM models, and to stencil performance modeling using layer conditions (LC). We then present Kerncraft, a tool that can automatically construct Roofline and ECM models for loop nests by performing the required code, data transfer, and LC analysis. The layer condition analysis allows to predict optimal spatial blocking factors for loop nests. Together with the models it enables an ab-initio estimate of the potential benefits of loop blocking optimizations and of useful block sizes. In cases where LC analysis is not easily possible, Kerncraft supports a cache simulator as a fallback option. Using a 25-point long-range stencil we demonstrate the usefulness and predictive power of the Kerncraft tool.