A 1000FPS@128/spl times/128 vision processor with 8-bit digitized I/O
A 1000FPS@128/spl times/128 vision processor with 8-bit digitized I/O
复制标题
具有 8 位数字化 I/O 的 1000FPS@128/spl times/128 视觉处理器
DOI：
10.1109/esscirc.2003.1257072
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发表时间：
2003
期刊：
影响因子：
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通讯作者：
S. Espejo
中科院分区：
文献类型：
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作者：
G. Cembrano;Á. Rodríguez;R. Castro;S. Espejo
本文演示了使用混合信号处理单元，根据SIMD计算方案操作，以解决单船的实时视觉问题。该原型采用0.35/spl mu/m全数字CMOS技术设计，包含/spl sim/ 3.75 mill。晶体管和显示器的峰值计算数字为330 GOPS，3.6 GOPS/mm/sup 2/和82.5 GOPS/W。该芯片集成了不同的光传感机制，集成和日志压缩类型，以避免在基于它的视觉系统中需要额外的成像器。虽然处理任务是使用模拟构建块实现的，但该芯片通过32位双向数据总线提供并接受8位数字化数据，该总线以120 Mbytes/s的速度运行。实验结果表明，在典型的室内光照条件下，可以达到1000 FPS的帧率。在如此高的速度下，芯片能够在图像采集的同时执行每帧约150个图像滤波操作、加法或布尔组合。这一功能，加上执行用户可选指令序列（存储在程序存储器中）和存储中间结果（最多8个灰度图像）的可能性，使芯片成为真正的通用传感/处理设备。
This paper demonstrates the use an of mixed-signal processing elements, operating according to a SIMD computing scheme, to solve real-time vision problems with a single ship. The prototype, designed in a 0.35/spl mu/m fully digital CMOS technology, contains /spl sim/ 3.75 mill. Transistors and exhibits peak computing figures of 330 GOPS, 3.6 GOPS/mm/sup 2/ and 82.5 GOPS/W. The chip incorporates different light sensing mechanisms, both integration and log-compression types, to avoid the need for an additional imager in a vision system based on it. Though processing tasks are implemented using analog building blocks, the chip provides, and accepts, 8-bit digitized data through a 32-bit bidirectional data bus which operates at 120Mbytes/s. Experimental results show that frame rates of 1000FPS can be achieved under typical room illumination conditions. At such high speed, the chip is capable to execute, concurrently to image acquisition, around 150 image filtering operations, additions, or Boolean combinations per frame. This feature, together with the possibility of executing sequences of user-selectable instructions (stored on a program memory), and storing intermediate results (up to 8 gray-scale images) makes the chip a true general-purpose sensory/processing device.