Applicability of approximate multipliers in hardware neural networks
Applicability of approximate multipliers in hardware neural networks
复制标题
近似乘法器在硬件神经网络中的适用性
DOI：
10.1016/j.neucom.2011.09.039
复制
发表时间：
2012
期刊：
影响因子：
6
通讯作者：
P. Bulić
中科院分区：
文献类型：
--
作者：
U. Lotrič;P. Bulić
近年来，人们对硬件神经网络越来越感兴趣，它比传统的软件模型有很多好处，主要是在速度、成本、可靠性或能源效率非常重要的应用中。这些硬件神经网络需要大量的资源、功率和耗时的乘法运算，因此在设计时必须特别小心。由于神经网络处理可以并行执行，因此通常要求设计尽可能多的并发乘法电路。实现这一目标的一个选择是用更简单的近似乘法电路取代复杂的精确乘法电路。本文演示了近似乘法电路在具有片上学习能力的前馈神经网络模型设计中的应用。在异构Proben1基准数据集上进行的实验表明，神经网络模型的自适应特性成功地补偿了近似乘法电路的计算误差。同时，所提出的设计还受益于更强的计算能力和更高的能源效率。
In recent years there has been a growing interest in hardware neural networks, which express many benefits over conventional software models, mainly in applications where speed, cost, reliability, or energy efficiency are of great importance. These hardware neural networks require many resource-, power- and time-consuming multiplication operations, thus special care must be taken during their design. Since the neural network processing can be performed in parallel, there is usually a requirement for designs with as many concurrent multiplication circuits as possible. One option to achieve this goal is to replace the complex exact multiplying circuits with simpler, approximate ones. The present work demonstrates the application of approximate multiplying circuits in the design of a feed-forward neural network model with on-chip learning ability. The experiments performed on a heterogeneous Proben1 benchmark dataset show that the adaptive nature of the neural network model successfully compensates for the calculation errors of the approximate multiplying circuits. At the same time, the proposed designs also profit from more computing power and increased energy efficiency.