Power analysis and optimization for high-speed I/O transceivers

Power analysis and optimization for high-speed I/O transceivers
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高速 I/O 收发器的功耗分析和优化

DOI:
10.1109/mwscas.2011.6026623
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发表时间:
2011
期刊:
2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)
影响因子:
--
通讯作者:
E. Alon
E. Alon
中科院分区:
--
文献类型:
--
作者:
Kwangmo Jung;Yue Lu;E. Alon

文献摘要

被引文献

相似文献

本文利用源串联端接 (SST) 发送器(接收连续时间线性均衡器 (CTLE) 或发送预加重)并在简单的单极通道上运行,分析优化了高速链路信令路径的整体功耗。分析得出发射摆幅和接收增益之间的最优分配以及两侧的功耗分配。分析还表明,实现可编程发送预加重所固有的预驱动器开销使接收 CTLE 成为更加节能的解决方案。
This paper analytically optimizes the overall power consumption of the signaling path of a high-speed link utilizing a source-series terminated (SST) transmitter, either a receive continuous-time linear equalizer (CTLE) or transmit pre-emphasis, and operating over a simple single-pole channel. The analysis derives the optimal allocation between transmit swing and receive gain as well as the allocation of power consumption between the two sides. The analysis also shows that the pre-driver overheads inherent in implementing programmable transmit pre-emphasis make the receive CTLE a substantially more power-efficient solution.