Design of a one-transistor-cell multiple-valued CAM
Design of a one-transistor-cell multiple-valued CAM
复制标题
一种单晶体管单元多值CAM的设计
DOI：
10.1109/jssc.1996.542311
复制
发表时间：
1996
影响因子：
5.4
通讯作者：
M. Kameyama
中科院分区：
文献类型：
--
作者：
T. Hanyu;N. Kanagawa;M. Kameyama
提出了一种新的高密度多值内容寻址存储器（CAM），以在有限的芯片面积上执行高度并行的搜索操作。通过使用多值数据表示减少了CAM中的单元数。此外，多值存储数据对应于浮栅MOS晶体管的阈值电压，使得可以仅使用单个晶体管来设计单元电路。其结果是，所提出的四值CAM的单元面积减少到传统的动态二进制CAM的14%，并且其性能比0.8-/spl μ/m标准EEPROM技术下的相应的二进制CAM的性能高约5.4倍。
A new high-density multiple-valued content-addressable memory (CAM) is proposed to perform highly parallel search operations in a limited chip area. The number of cells in the CAM is reduced by the use of multiple-valued data representation. Moreover, multiple-valued stored data correspond to the threshold voltage of a floating-gate MOS transistor, so that the cell circuit can be designed using only a single transistor. As a result, the cell area of the proposed four-valued CAM is reduced to 14% of that of a conventional dynamic binary CAM, and its performance is about 5.4-times higher than that of the corresponding binary one under a 0.8-/spl mu/m standard EEPROM technology.