Reduction of Base-Collector Capacitance in Submicron InP/GaInAs Heterojunction Bipolar Transistors with Buried Tungsten Wires
Reduction of Base-Collector Capacitance in Submicron InP/GaInAs Heterojunction Bipolar Transistors with Buried Tungsten Wires
复制标题
用埋钨丝降低亚微米 InP/GaInAs 异质结双极晶体管的基极-集电极电容
DOI：
10.1143/jjap.40.l735
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发表时间：
2001
影响因子：
1.5
通讯作者：
K. Furuya
中科院分区：
文献类型：
--
作者：
T. Arai;S. Yamagami;Y. Miyamoto;K. Furuya
采用电子束曝光法在InP集电层中埋入3根宽度为100 nm、高度为100 nm、周期为200 nm的钨丝，制作了发射极宽度为0.5µm、周期为200 nm的埋入式金属异质结双极晶体管。对于发射极面积为0.5×2.5µm2的器件，基极-集电极总电容降至传统异质结双极晶体管物理尺寸的30%左右，电流增益截止频率为86 GHz，最大振荡频率高于135 GHz。
A buried metal heterojunction bipolar transistor with a 0.5-µm-wide emitter was fabricated by electron-beam lithography, in which three tungsten wires of 100 nm width, 100 nm height and 200 nm period were buried in the InP collector layer. For the device with an emitter area of 0.5×2.5 µm2, total base-collector capacitance was reduced to about 30% of that calculated from the physical dimensions of a conventional heterojunction bipolar transistor, and a current gain cutoff frequency of 86 GHz and a maximum oscillation frequency higher than 135 GHz were obtained.