Reduction of Timer Interrupts for Embedded Assembly Programs Based on Reduction of Interrupt Handler Executions
Reduction of Timer Interrupts for Embedded Assembly Programs Based on Reduction of Interrupt Handler Executions
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基于减少中断处理程序执行来减少嵌入式汇编程序的定时器中断
DOI：
10.1109/gcce53005.2021.9622013
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发表时间：
2021
期刊：
影响因子：
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通讯作者：
Satoshi Yamane
中科院分区：
文献类型：
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作者：
Taro Kiriyama;Yajun Wu;Satoshi Yamane
在嵌入式系统的程序验证中，减少验证时间是一个重要的问题。为此，一种解决方案是减少中断处理程序执行的次数。特别是，当包含定时器中断等周期性中断时，有必要了解实际时间。在本文中，我们提出了一种算法的基础上中断处理程序执行减少（IHER），以减少定时器中断的数量，通过定义一个CFA，可以处理时间，同时考虑实时性能。最后通过实例验证了该算法的有效性。
In the verification of programs for embedded systems, it is important to reduce the verification time. For this purpose, one solution is to reduce the number of interrupt handler executions. In particular, when periodic interrupts such as timer interrupts are incorporated, it is necessary to understand the actual time. In this paper, we propose an algorithm based on interrupt handler execution reduction (IHER) to reduce the number of timer interrupts by defining a CFA that can handle time, while considering real-time performance. The effectiveness of this algorithm is verified by a case study.