Effects of the film thickness of a ground plane in the SFQ circuits with a dc-power layer
Effects of the film thickness of a ground plane in the SFQ circuits with a dc-power layer
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带直流电源层的 SFQ 电路中接地层膜厚的影响
DOI：
10.1088/0953-2048/20/11/s08
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发表时间：
2007
影响因子：
3.6
通讯作者：
M. Hidaka
中科院分区：
文献类型：
--
作者：
H. Akaike;A. Fujimaki;S. Nagasawa;Y. Kitagawa;M. Hidaka
通过改变接地层的厚度，研究了直流电源层对单通量量子电路性能的影响。将DCP层置于GP下方并用作偏置电流进料。进行了两次测量。一种是使用SQUID直接检测GP上方的磁通量。结果表明，在回流电流从接地层引出的条件下，膜厚大于400 nm的GP能有效地完全抑制磁通。另一个是评估具有8032个约瑟夫森结和总设计偏置电流为1.05A的408位移位寄存器电路（SR）的工作裕度。结果表明，500 nm厚的GP具有优势，比300 nm厚的GP的上边缘的依赖性的偏置电流端口的SR。
We have investigated the effect of a dc-power (DCP) layer on the performance of single flux quantum (SFQ) circuits by changing the film thickness of a ground plane (GP). The DCP layer was placed below the GP and was used as bias current feeds. Two measurements were conducted. One was direct detection of the magnetic flux above the GP by using SQUIDs. The results indicated that the GPs with film thicknesses of more than 400 nm were effective to completely suppress the flux under the condition that the return current was extracted from the ground plane. The other was evaluation of the operating margins of the 408 bit shift register circuits (SRs) with 8032 Josephson junctions and a total designed bias current of 1.05 A. The results showed that a 500 nm thick GP had an advantage over a 300 nm thick GP in the dependence of the upper margin on the bias current port of the SR.