High-resolution DPWM generator for digitally controlled DC-DC converters
High-resolution DPWM generator for digitally controlled DC-DC converters
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DOI：
10.1109/apccas.2008.4746172
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发表时间：
2008-11
期刊：
影响因子：
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通讯作者：
Ibuki Mori;Keigo Kimura;Y. Yamada;Haruo Kobayashi;Y. Kobori;Santhos A. Wibowo;K. Shimizu;M. Kono-M.
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文献类型：
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作者：
Ibuki Mori;Keigo Kimura;Y. Yamada;Haruo Kobayashi;Y. Kobori;Santhos A. Wibowo;K. Shimizu;M. Kono-M.
介绍了一种用于数字控制DC-DC转换器的高分辨率数字脉宽调制(DPWM)产生器的新结构，脉宽调制时间分辨率由两个(或多个)门延迟之间的差值决定，而常规DPWM电路的时间分辨率由门延迟本身决定。所提出的DPWM电路具有电路小、时间分辨率高、功耗低等优点。提出了一种基于扩展欧几里德算法的DPWM电路系统设计方法。文中给出了一个在80 ns周期内达到10ps时间分辨率(即13位分辨率)的设计实例，验证了所提DPWM结构的有效性。
This paper describes a new architecture for high-resolution digital PWM (DPWM) generator used in digitally-controlled DC-DC converters, PWM time resolution is determined by the difference between two (or more) gate delays, while that of conventional DPWM circuits is determined by gate delay itself. The proposed DPWM circuit can achieve fine time resolution with small circuits, and has low power consumption. We have also developed a systematic design method for this DPWM circuit based on the extended Euclidean algorithm. A design example that achieves 10 ps time resolution for 80 ns cycle time (i.e. 13-bit resolution) is shown to demonstrate the effectiveness of the proposed DPWM architecture.