Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity
Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity
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DOI：
10.3390/cryptography4020013
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发表时间：
2020-04
期刊：
影响因子：
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通讯作者：
Ivan Bow;N. Bete;F. Saqib;Wenjie Che;C. Patel;R. Robucci;Calvin Chan;J. Plusquellic
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文献类型：
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作者：
Ivan Bow;N. Bete;F. Saqib;Wenjie Che;C. Patel;R. Robucci;Calvin Chan;J. Plusquellic
本文研究了对抗侧信道攻击的方法。针对现场可编程门阵列（FPGA）的差分功耗分析（DPA）和相关功耗分析（CPA）等技术难以实现的问题，提出了一种动态部分重构（DPR）方法。对于使用DPR或SPREAD的加密算法，我们将该技术称为侧信道功率抵抗。SPREAD旨在通过使用DPR动态改变硬件实现的组件来减少电源瞬态中与密钥相关的信号相关性。高级加密标准（AES）算法中的复制原语，特别是替换盒（SBOX），被合成为多个不同的门级实现。不同的实现方式改变了SBOX的延迟特性，降低了功率迹线中的相关性，这反过来又增加了侧信道攻击的难度。所提出的对策的有效性在很大程度上取决于这一原则，因此，本文的重点是实施多样性技术的评价。
This paper investigates countermeasures to side-channel attacks. A dynamic partial reconfiguration (DPR) method is proposed for field programmable gate arrays (FPGAs)s to make techniques such as differential power analysis (DPA) and correlation power analysis (CPA) difficult and ineffective. We call the technique side-channel power resistance for encryption algorithms using DPR, or SPREAD. SPREAD is designed to reduce cryptographic key related signal correlations in power supply transients by changing components of the hardware implementation on-the-fly using DPR. Replicated primitives within the advanced encryption standard (AES) algorithm, in particular, the substitution-box (SBOX)s, are synthesized to multiple and distinct gate-level implementations. The different implementations change the delay characteristics of the SBOXs, reducing correlations in the power traces, which, in turn, increases the difficulty of side-channel attacks. The effectiveness of the proposed countermeasures depends greatly on this principle; therefore, the focus of this paper is on the evaluation of implementation diversity techniques.