Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems
Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems
复制标题
基于 FPGA 的众核系统的联合通信调度和互连综合
DOI：
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发表时间：
2014
期刊：
影响因子：
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通讯作者：
A. Mazzeo
中科院分区：
文献类型：
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作者：
A. Cilardo;E. Fusella;L. Gallo;A. Mazzeo
这项工作提出了一种自动化的方法来优化基于FPGA的众核互连架构。基于应用的通信需求，该方法同时定义的互连结构和通信任务调度，考虑到给定的区域约束下的任务之间可能的依赖关系。由此产生的体系结构提高了通信并行性的水平，可以利用，同时保持低面积成本。本文详细介绍了所提出的方法，并讨论了一些案例研究所提出的技术的影响。
This work proposes an automated methodology for optimizing FPGA-based many-core interconnect architectures. Based on the application communication requirements, the methodology concurrently defines the structure of the interconnect and the communication task scheduling, taking into account possible dependencies between tasks under given area constraints. The resulting architecture improves the level of communication parallelism that can be exploited while keeping area costs low. The paper thoroughly describes the proposed approach and discusses a few case-studies showing the impact of the proposed technique.