Design of driving circuit for binocular CCD image system
Design of driving circuit for binocular CCD image system
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DOI：
10.1117/12.866039
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发表时间：
2010-05
期刊：
影响因子：
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通讯作者：
Mingyu Zhang;Jianyue Ren;Xingxiang Zhang
中科院分区：
文献类型：
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作者：
Mingyu Zhang;Jianyue Ren;Xingxiang Zhang
针对采用Dalsa公司生产的高分辨率全画幅3300万像素面阵CCD FTF 5066 M的双目CCD成像系统，设计了一种高灵敏度、宽动态、高信噪比的驱动电路。介绍了FTF 5066 M传感器的内部结构和驱动时序。采用现场可编程门阵列（FPGA）作为主要器件，完成了两个传感器电路的时序设计和功率驱动控制。采用相关双采样技术，降低了视频噪声，提高了系统的信噪比。采用12位A/D转换器提高图像质量。采用该集成芯片设计的成像系统，通过双通道输出速率可达1.3帧/秒。该驱动系统具有性能好、功耗低、体积小等优点，可广泛应用于航空航天领域。通过进一步改进，通过两个CCD的所有八个通道可以达到每秒2.7帧的最大数据输出速率。
The paper designs a driving circuit of high sensitive, wide dynamic and high signal-to-noise ratio for binocular CCD imaging system which adopts a Dalsa-made high resolution full-frame 33-mega pixels area CCD FTF5066M. Inner structure and driving timing of the FTF5066M sensor are presented. Field Programmable Gate Array (FPGA) is used as the main device to accomplish the timing design of the circuits and power driver control of the two sensors. By using the Correlated Double Sampling (CDS) technique, the video noise is reduced and the SNR of the system is increased. A 12- bit A/D converter is used to improve the image quality. The output rate of the imaging system designed with integrated chip can reach to 1.3 frames per second through bi-channel. For its good performance, low power consumption and small volume, the driving system can be applied to aeronautics and astronautics field. With a further improvement, a maximum data output rate of 2.7 frames per second can be reached through all the eight channels of the two CCDs.