A high performance floating point coprocessor
A high performance floating point coprocessor
复制标题
高性能浮点协处理器
DOI：
10.1109/jssc.1984.1052209
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发表时间：
1984
影响因子：
5.4
通讯作者：
R. Yodlowski
中科院分区：
文献类型：
--
作者：
G. Wolrich;E. McLellan;L. Harada;J. Montanaro;R. Yodlowski
本文介绍了一种采用3-/spl μ/m双金属NMOS工艺制作的34000管单片浮点协处理器。分数数据路径，包括一个移位器和60位进位传播ALU，在100 ns内循环所有需要少于19位连续进位的操作。一个通用的进行长度检测计划，这需要最少的额外逻辑，是用来延长微周期的小百分比的操作中存在一个长进位。采用三位周期乘法和一位半周期除法算法，实现了良好的整体性能。
A 34000-transistor single-chip floating-point coprocessor fabricated in 3-/spl mu/m double metal NMOS technology is described. The fraction data path, including a shifter and 60-bit carry propagate ALU, is cycled in 100 ns for all operations requiring less than 19 bits of consecutive carry. A versatile carry length detection scheme, which requires minimal additional logic, is used to extend the microcycle for the small percentage of operations in which a long carry exists. Three-bit-per-cycle multiplication and one-and-one-half-bit-per-cycle division algorithms were used to achieve excellent overall performance.