A Probabilistic Error Model and Framework for Approximate Booth Multipliers

A Probabilistic Error Model and Framework for Approximate Booth Multipliers
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DOI:
10.1145/3232195.3232200
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发表时间:
2018-07
期刊:
2018 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
影响因子:
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通讯作者:
Yuying Zhu;Weiqiang Liu;Jie Han;F. Lombardi
Yuying Zhu;Weiqiang Liu;Jie Han;F. Lombardi
中科院分区:
其他
文献类型:
--
作者:
Yuying Zhu;Weiqiang Liu;Jie Han;F. Lombardi

文献摘要

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近似计算是一种通过牺牲计算精度来进行高性能和低功耗设计的范例。本文分析了一种近似改进型基4Booth乘法器的结构。提出了一种概率误差模型,以便于计算近似基-4 Booth编码、近似规则部分积阵列和近似4-2压缩器的误差的近似乘子。利用该模型求出了8位和16位近似设计的归一化平均误差距离。误差模型和相应分析框架的计算结果与仿真结果接近,从而验证了该方法的有效性。
Approximate computing is a paradigm for high performance and low power design by compromising computational accuracy. In this paper, the structure of an approximate modified radix-4 Booth multiplier is analyzed. A probabilistic error model is proposed to facilitate the evaluation of the approximate multiplier for errors from the approximate radix-4 Booth encoding, the approximate regular partial product array, and the approximate 4-2 compressor. The normalized mean error distances (NMEDs) of 8-bit and 16-bit approximate designs are found by utilizing the proposed model. The results from the error model and the corresponding analytical framework are close to those found by simulation, thus confirming the validity of the proposed approach.