A 37.6mm2 1024-channel high-compliance-voltage SoC for epiretinal prostheses

A 37.6mm2 1024-channel high-compliance-voltage SoC for epiretinal prostheses
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用于视网膜前假体的 37.6mm2 1024 通道高顺应电压 SoC

DOI:
10.1109/isscc.2013.6487741
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发表时间:
2013
期刊:
2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers
影响因子:
--
通讯作者:
Wentai Liu
Wentai Liu
中科院分区:
--
文献类型:
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作者:
Kuanfu Chen;Y. Lo;Wentai Liu

文献摘要

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视网膜植入物为因光感受器丧失而失明的人带来了光感。商业化的60通道视网膜假体允许患者执行简单的任务,但人脸识别/读取需要数百到1000个电极[1,2],这给下一代视网膜刺激器的设计带来了巨大的挑战。除了更高的功率/数据需求外,电极阻抗也增加了。在直径5 mm的黄斑区放置1,000个视网膜前电极可将电极尺寸减小到小于0.01mm2,从而产生30kΩ的电极-组织阻抗[2]。为了获得不同亮度级别的光感,视网膜前假体的刺激器要求输出顺应电压为±10V[3],因此需要面积消耗高电压(HV)晶体管。文献[4]中的刺激器可以达到1600个通道,但它是为视网膜下假体而不是视网膜前假体设计的。它符合±2V标准,需要单独的芯片用于电力遥测。对于视网膜前假体,文献[3]中符合HV的1024通道刺激器估计占地64mm2,需要芯片外二极管进行功率整流。对于空间受限的视网膜植入物,小尺寸、全集成、芯片外元件数量最少的SoC是首选。
Retinal implants elicit light perception for people blinded by photoreceptor loss. Commercialized 60-channel retinal prostheses allow patients to perform simple tasks, but several hundreds to a thousand electrodes are required for face recognition/reading [1,2], posing great challenges for the design of next-generation retinal stimulators. Aside from the higher power/data demand, the electrode impedance is also increased. Placing 1000 epiretinal electrodes in the 5mm-diameter macula region reduces the electrode size to less than 0.01mm2, leading to a 30kΩ electrode-tissue impedance [2]. To elicit light perception of various brightness levels, the stimulators for epiretinal prostheses require an output compliance voltage of ±10V [3], thus requiring area-consuming high-voltage (HV) transistors. The stimulator in [4] achieves 1600 channels, but it is designed for subretinal rather than epiretinal prostheses. It has ±2V compliance and needs a separate chip for power telemetry. For epiretinal prostheses, an HV-compliant 1024-channel stimulator in [3] is estimated to occupy 64mm2 and requires off-chip diodes for power rectification. For a space-restricted retinal implant, a small-sized fully integrated SoC with minimal number of off-chip components is preferred.