Integrated circuits using top-gate ZnO nanowire transistors with ultrathin organic gate dielectric
Integrated circuits using top-gate ZnO nanowire transistors with ultrathin organic gate dielectric
复制标题
使用具有超薄有机栅极电介质的顶栅氧化锌纳米线晶体管的集成电路
DOI：
10.1109/iedm.2009.5424286
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发表时间：
2009
期刊：
影响因子：
--
通讯作者：
H. Klauk
中科院分区：
文献类型：
--
作者：
D. Kälblein;H. J. Bottcher;R. Thomas Weitz;U. Zschieschang;Klaus Kern;H. Klauk
我们报告的场效应晶体管的基础上生长的单晶ZnO纳米线的直径约为50 nm的湿化学合成。生长的纳米线具有很大的导电性，这使得很难用栅场控制漏极电流，但通过600°C的生长后退火，导电性大大降低。使用的解决方案处理的有机栅极电介质的厚度为2.1 nm和重叠的金属顶栅电极图案化的电子束光刻，我们已经制备了具有良好的静态性能的纳米线晶体管。通过在同一纳米线上图案化多个晶体管，我们还在单个纳米线上制备了简单的逻辑电路。
We report on field-effect transistors based on single-crystalline ZnO nanowires with a diameter of about 50 nm grown by wet-chemical synthesis. The as-grown nanowires have a large conductivity that makes it difficult to control the drain current with the gate field, but the conductivity is greatly reduced by a post-growth anneal at 600°C. Using a solution-processed organic gate dielectric with a thickness of 2.1 nm and overlapping metal top gate electrodes patterned by electron-beam lithography we have prepared nanowire transistors with good static performance. By patterning more than one transistor on the same nanowire we have also prepared simple logic circuits on a single nanowire.