Novel Reduced ON-Resistance LDMOS With an Enhanced Breakdown Voltage

Novel Reduced ON-Resistance LDMOS With an Enhanced Breakdown Voltage
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具有增强击穿电压的新型低导通电阻 LDMOS

DOI:
10.1109/ted.2014.2364842
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发表时间:
2014
影响因子:
3.1
通讯作者:
Li Zhaoji
Li Zhaoji
中科院分区:
工程技术2区
文献类型:
--
作者:
Xiaorong Luo;Jie Wei;Xianlong Shi;Kun Zhou;Ruichao Tian;Zhang Bo;Li Zhaoji

文献摘要

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提出了一种新的横向双扩散金属氧化物半导体(LDMOS),以提高其击穿电压(BV)和降低比导通电阻(RON,sp),并通过仿真研究了其作用机理。它的特点是在表面有一个结场板(JFP),在p基板上有一个N+浮动层(NFL)。横向变化掺杂JFP不仅可以调节表面电场(e场)分布以提高BV,而且由于JFP在off状态下的n -漂移区和P区之间的电荷补偿效应,可以允许较高的n -漂移掺杂浓度,从而降低RON。重掺杂的NFL没有完全耗尽,因此在横向方向上是等电位层。因此,它重塑了源极和漏极两侧的等电位轮廓,避免了漏极下的电场集中和过早击穿;另外,在NFL和P-sub之间诱导了额外的垂直二极管,从而延长了P-sub的耗尽宽度,两者都增加了BV。在相同尺寸下,JFP-NFL LDMOS的RON、sp和BV分别比传统LDMOS提高了47%和63%。JFP-NFL LDMOS采用平面技术,在RON、sp和BV之间实现了卓越的权衡,实现了不同的单、双、三层减少表面场ldmosfet。
A novel Lateral Double-diffusion Metal Oxide Semiconductor (LDMOS) is proposed to enhance its breakdown voltage (BV) and reduce specific ON-resistance (RON,sp), and its mechanism is investigated by simulation. It features a junction field plate (JFP) at surface and an N+ floating layer (NFL) in the P-substrate. The lateral variation doping JFP not only modulates the surface electric field (E-field) distribution to improve the BV, but also allows a high N-drift doping concentration and thus reduces the RON,sp owing to the charge compensation effect between the N-drift region and P region in the JFP in the OFF-state. The heavily doped NFL is not fully depleted and thus is an equipotential layer in the lateral direction. It thus reshapes the equipotential contours at both the source and drain sides, avoiding the E-field concentration and premature breakdown under the drain; moreover, the additional vertical diode is induced between the NFL and P-sub and it thus extends the depletion width in P-sub, both of which increase the BV. The RON,sp and BV of the JFP-NFL LDMOS is improved by 47% and 63%, respectively, compared with those of a conventional LDMOS at the same dimension. The JFP-NFL LDMOS achieves a superior tradeoff between RON,sp and BV to the different single-, double-, and triple-REduced SURface Field LDMOSFETs with planar technology.