Profiling-Based Hardware/Software Co-Exploration for the Design of Video Coding Architectures

Profiling-Based Hardware/Software Co-Exploration for the Design of Video Coding Architectures
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基于分析的视频编码架构设计的硬件/软件协同探索

DOI:
10.1109/tcsvt.2009.2031522
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发表时间:
2009
影响因子:
8.4
通讯作者:
B. Stabernack
B. Stabernack
中科院分区:
工程技术1区
文献类型:
--
作者:
H. Hübert;B. Stabernack

文献摘要

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嵌入式软硬件系统的设计往往对其各个方面都有严格的要求,包括实时性、功耗和芯片面积。尤其是对于数据密集型应用,内存访问次数是影响这些方面的主要因素。为了满足需求,设计一个适应性好的系统,需要对软件部分进行优化,并设计出合适的系统和处理器体系结构。在本文中,我们致力于为基于总线的体系结构寻找一个优化的存储层次结构。此外,还探索了用于特定应用处理器核的有用的指令集扩展。对于复杂的应用程序,这种设计空间探索是困难的,需要对应用程序及其实现备选方案进行深入分析。需要帮助设计人员进行硬件和软件的设计、优化和调度的工具。我们提出了一个分析工具,用于快速准确地分析嵌入式系统的性能、功耗和内存访问。本文展示了如何在以处理器为中心的体系结构的设计流程中应用该工具进行高效的硬件/软件协同开发。这一概念已经在具有多个处理单元的视频解码的硬件/软件混合系统的设计中得到了验证。
The design of embedded hardware/software systems is often subject to strict requirements concerning its various aspects, including real-time performance, power consumption, and die area. Especially for data intensive applications, the number of memory accesses is a dominant factor for these aspects. In order to meet the requirements and design a well-adapted system, the software parts need to be optimized and an adequate system and processor architecture needs to be designed. In this paper, we focus on finding an optimized memory hierarchy for bus-based architectures. Additionally, useful instruction set extensions for application-specific processor cores are explored. For complex applications, this design space exploration is difficult and requires in-depth analysis of the application and its implementation alternatives. Tools are required which aid the designer in the design, optimization, and scheduling of hardware and software. We present a profiling tool for fast and accurate performance, power, and memory access analysis of embedded systems. This paper shows how the tool can be applied for an efficient hardware/software co-exploration within the design flow of processor-centric architectures. This concept has been proven in the design of a mixed hardware/software system with multiple processing units for video decoding.