Tunnel field-effect transistor charge-trapping memory with steep subthreshold slope and large memory window
Tunnel field-effect transistor charge-trapping memory with steep subthreshold slope and large memory window
复制标题
具有陡峭亚阈值斜率和大存储窗口的隧道场效应晶体管电荷捕获存储器
DOI:
10.7567/jjap.57.04fe07
复制
发表时间:
2018
影响因子:
1.5
通讯作者:
Tetsu Tanaka
中科院分区:
文献类型:
--
作者:
H. Kino;T. Fukushima;Tetsu Tanaka
Charge-trapping memory requires the increase of bit density per cell and a larger memory window for lower-power operation. A tunnel field-effect transistor (TFET) can achieve to increase the bit density per cell owing to its steep subthreshold slope. In addition, a TFET structure has an asymmetric structure, which is promising for achieving a larger memory window. A TFET with the N-type gate shows a higher electric field between the P-type source and the N-type gate edge than the conventional FET structure. This high electric field enables large amounts of charges to be injected into the charge storage layer. In this study, we fabricated silicon–oxide–nitride–oxide–semiconductor (SONOS) memory devices with the TFET structure and observed a steep subthreshold slope and a larger memory window.