On and Off-Chip Crosstalk Avoidance in VLSI Design

On and Off-Chip Crosstalk Avoidance in VLSI Design
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VLSI 设计中的片上和片外串扰避免

DOI:
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发表时间:
2010
期刊:
影响因子:
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通讯作者:
S. Khatri
S. Khatri
中科院分区:
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文献类型:
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作者:
C. Duan;B. Lameres;S. Khatri

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深亚微米(DSM)工艺给超大规模集成电路(VLSI)设计者带来了许多变化。最大的挑战之一是串扰,这随着VLSI制造工艺的特征尺寸的缩小而变得显著。串扰的存在极大地限制了速度并增加了IC设计的功耗。这本书的重点是避免串扰与总线编码,技术之一,有选择地减轻串扰的影响,提高速度和功耗的总线互连。该技术在通过总线传输之前对数据进行编码,以避免某些不期望的串扰条件,从而提高总线速度和/或能量消耗。
Deep Sub-Micron (DSM) processes present many changes to Very Large Scale Integration (VLSI) circuit designers. One of the greatest challenges is crosstalk, which becomes significant with shrinking feature sizes of VLSI fabrication processes. The presence of crosstalk greatly limits the speed and increases the power consumption of the IC design. This book focuses on crosstalk avoidance with bus encoding, one of the techniques that selectively mitigates the impact of crosstalk and improves the speed and power consumption of the bus interconnect. This technique encodes data before transmission over the bus to avoid certain undesirable crosstalk conditions and thereby improve the bus speed and/or energy consumption.