Dynamic speculative precomputation

Dynamic speculative precomputation
复制标题

DOI:
10.1109/micro.2001.991128
复制
发表时间:
2001-12
期刊:
Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture. MICRO-34
影响因子:
--
通讯作者:
Jamison D. Collins;D. Tullsen;Hong Wang;John Paul Shen
Jamison D. Collins;D. Tullsen;Hong Wang;John Paul Shen
中科院分区:
其他
文献类型:
--
作者:
Jamison D. Collins;D. Tullsen;Hong Wang;John Paul Shen

文献摘要

被引文献

相似文献

在内存受限的应用程序中,大量的内存访问是不规则的,例如指针解引用,并且可以通过基于线程的预取技术(如推测性预计算)有效地针对。这些技术例如在可用的SMT线程上下文上执行指令,这些指令已经直接从它们试图加速的程序中提取。所提出的技术通常需要手动用户干预来提取和优化指令序列。本文提出了动态推测预计算,它执行所有必要的指令分析,提取和优化,通过使用后端的指令分析硬件,位于处理器的关键路径。对于一组内存有限的基准测试时,实现了14%的平均加速比时,构造简单的p片,这一增益增长到33%时,利用积极的优化。
A large number of memory accesses in memory-bound applications are irregular, such as pointer dereferences, and can be effectively targeted by thread-based prefetching techniques like Speculative Precomputation. These techniques execute instructions, for example on an available SMT thread context, that have been extracted directly from the program they are trying to accelerate. Proposed techniques typically require manual user intervention to extract and optimize instruction sequences. This paper proposes Dynamic Speculative Precomputation, which performs all necessary instruction analysis, extraction, and optimization through the use of back-end instruction analysis hardware, located off the processor's critical path. For a set of memory limited benchmarks an average speedup of 14% is achieved when constructing simple p-slices, and this gain grows to 33% when making use of aggressive optimizations.