Multilevel Resistive Switching in Planar Graphene/SiO2 Nanogap Structures
Multilevel Resistive Switching in Planar Graphene/SiO2 Nanogap Structures
复制标题
平面石墨烯/SiO2 纳米间隙结构中的多级电阻开关
DOI：
10.1021/nn300735s
复制
发表时间：
2012-05-01
期刊：
影响因子：
17.1
通讯作者：
Zhang, Guangyu
中科院分区：
文献类型：
--
作者：
He, Congli;Shi, Zhiwen;Zhang, Guangyu
We report a planar graphene/SiO2 nanogap structure for multilevel resistive switching. Nanosized gaps created on a SiO2 substrate by electrical breakdown of nanographene electrodes were used as channels for resistive switching. Two-terminal devices exhibited excellent memory characteristics with good endurance up to 10(4) cycles, long retention time more than 10(5) s, and fast switching speed down to 500 ns. At least five conduction states with reliability and reproducibility were demonstrated in these memory devices. The mechanism of the resistance switching effect was attributed to a reversible thermal-assisted reduction and oxidation process that occurred at the breakdown region of the SiO2 substrate. In addition, the uniform and wafer-size nanographene films with controlled layer thickness and electrical resistivity were grown directly on SiO2 substrates for scalable device fabrications, making it attractive for developing high-density and low-cost nonvolatile memories.
