Power gating of VLSI circuits using MEMS switches in low power applications
Power gating of VLSI circuits using MEMS switches in low power applications
复制标题
在低功耗应用中使用 MEMS 开关的 VLSI 电路的电源门控
DOI:
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发表时间:
2011
期刊:
影响因子:
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通讯作者:
M. Anis
中科院分区:
文献类型:
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作者:
Hosam Shobak;M. Ghoneim;Nawal El Boghdady;S. Halawa;Sophinese Iskander;M. Anis
Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods.