CaT: A Solver-Aided Compiler for Packet-Processing Pipelines
CaT: A Solver-Aided Compiler for Packet-Processing Pipelines
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DOI：
10.1145/3582016.3582036
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发表时间：
2023-03
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影响因子：
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通讯作者：
Xiangyu Gao;Divya Raghunathan;Rui Fang;Tao Wang;Xiaotong Zhu;Anirudh Sivaraman;S. Narayana;Aarti Gupta
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作者：
Xiangyu Gao;Divya Raghunathan;Rui Fang;Tao Wang;Xiaotong Zhu;Anirudh Sivaraman;S. Narayana;Aarti Gupta
将高级程序汇编为高速数据包处理管道是一个挑战组合优化问题。资源的方法是解决这个问题的各个方面。时间。管道资源避免稀缺的综合，将复杂的交易代码分解为管道的计算单元。资源。当前在管道上运行并比现有编译器更快地生成代码，而生成的代码使用的管道资源较少。
Compiling high-level programs to high-speed packet-processing pipelines is a challenging combinatorial optimization problem. The compiler must configure the pipeline’s resources to match the semantics of the program’s high-level specification, while packing all of the program’s computation into the pipeline’s limited resources. State of the art approaches tackle individual aspects of this problem. Yet, they miss opportunities to produce globally high-quality outcomes within reasonable compilation times. We develop a framework to decompose the compilation problem for such pipelines into three phases—making extensive use of solver engines (e.g., ILP, SMT, and program synthesis) to simplify the development of these phases. Transformation rewrites programs to use more abundant pipeline resources, avoiding scarce ones. Synthesis breaks complex transactional code into configurations of pipelined compute units. Allocation maps the program’s compute and memory to the pipeline’s hardware resources. We prototype these ideas in a compiler, CaT, which targets (1) the Tofino programmable switch pipeline and (2) Menshen, a cycle-accurate simulator of a Verilog description of the RMT pipeline. CaT can handle programs that existing compilers cannot currently run on pipelines and generates code faster than existing compilers, where the generated code uses fewer pipeline resources.