Compact test generation for bridging faults under I/sub DDQ/ testing

Compact test generation for bridging faults under I/sub DDQ/ testing
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I/sub DDQ/测试下桥接故障的紧凑测试生成

DOI:
10.1109/vtest.1995.512654
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发表时间:
1995
期刊:
Proceedings of the ... IEEE VLSI Test Symposium
影响因子:
--
通讯作者:
S. Kajihara
S. Kajihara
中科院分区:
--
文献类型:
--
作者:
R. S. Reddy;I. Pomeranz;S. Reddy;S. Kajihara

文献摘要

被引文献

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我们提出了一个程序,以生成I/ Sub DDQ/测试下桥接故障的紧凑测试集。采用了几种技术来实现紧凑的测试集。在这种情况下,针对卡住断层开发的启发式方法被证明是有效的。专门针对桥接故障设计的技术是基于以下观察结果:可以使用一组线路表示尚未实现的故障,如果代表尚未实现的故障的线集(每额外的测试矢量)减半,则可以获得最小的测试集大小。 。逻辑块称为位置的逻辑块允许使用测试生成器以解决故障的测试生成器对行组进行分区,而无需提前确定给定集中的行如何分配。因此,可以针对任何线路设置大小以具有成本效益的方式进行分区。实验结果表明,所提出的程序生成的测试集小于先前提出的程序获得的测试集。
We propose a procedure to generate compact test sets for bridging faults under I/sub DDQ/ testing. Several techniques are employed to achieve compact test sets. Heuristics developed for stuck-at faults are shown to be effective in this context. The techniques especially designed for bridging faults are based on the observation that the yet-undetected faults can be represented using sets of lines and that a minimum test set size is obtained if the line sets representing yet-undetected faults are halved with every additional test vector. Logic blocks called bit-adders allow the partitioning of the line sets using a test generator for stuck-at faults, without having to determine in advance how the lines in a given set will be divided. Thus partitioning can be performed in a cost effective way for any line set size. Experimental results show that the test sets generated by the proposed procedure are smaller than those obtained by previously proposed procedures.