Dark silicon-power-thermal aware runtime mapping and configuration in heterogeneous many-core NoC
Dark silicon-power-thermal aware runtime mapping and configuration in heterogeneous many-core NoC
复制标题
异构多核 NoC 中的暗硅-功率-热感知运行时映射和配置
DOI:
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发表时间:
2017
期刊:
影响因子:
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通讯作者:
M. Bayoumi
中科院分区:
文献类型:
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作者:
Md Farhadur Reza;Dan Zhao;M. Bayoumi
To address power-thermal-dark silicon issues in many-core chip, run time task-resource and voltage co-allocation with reconfigurable network-on-chip (NoC) framework for energy and hotspots minimization is proposed in this work. At runtime, the global manager with the help of proposed MinEnergy mapping algorithm reconfigures the NoC links bandwidth and nodes voltage-level and power-gated the resources depending on the traffic demand and resource statistics collected from the distributed cluster-managers. MinEnergy mapping algorithm minimizes overall chip power and thermal hotspots in heterogeneous large-scale NoC. We have formulated the mapping and configuration problem into a linear optimization model and implemented a traditional minimum-path contiguous mapping for comparisons. Simulations show that MinEnergy dynamic mapping solution is 80–90% close to the optimal solution, and significantly better than the minimum-path mapping solution.