Sub-microsecond response digital controller for POL

Sub-microsecond response digital controller for POL
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DOI：
10.1109/ipec.2014.6869977
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发表时间：
2014-05
期刊：
2014 International Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE ASIA)
影响因子：
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通讯作者：
Hirotaka Nonaka;Y. Ishizuka;Kenji Mii;Fumiaki Takenami;D. Kanemoto
Hirotaka Nonaka;Y. Ishizuka;Kenji Mii;Fumiaki Takenami;D. Kanemoto
中科院分区：
其他
文献类型：
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作者：
Hirotaka Nonaka;Y. Ishizuka;Kenji Mii;Fumiaki Takenami;D. Kanemoto

文献摘要

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本文将讨论所提出的硬件逻辑型数字控制器的板上开关电源，有一个很小的时间延迟在控制回路。进行了负载电流变化实验和开环传递函数的频率特性实验。这些结果表明，该电路可以将时间延迟抑制到亚微秒量级。采用多相系统减小了输出涟漪。
This paper will discuss about the proposed hard-ware logic type digital controller for on-board SMPS which has a very small time-delay in control loop. Some experimental has been done including estimation of the load current change experiment and the frequency characteristic of open loop transfer function. These result reveal the proposed circuit could be suppressed the time delay to sub-microsecond order. To use the multi-phase system reduces the output ripple.