Low-Power Coding: Trends and New Challenges
Low-Power Coding: Trends and New Challenges
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低功耗编码：趋势和新挑战
DOI：
10.1166/jolpe.2017.1507
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发表时间：
2017
期刊：
影响因子：
--
通讯作者：
A. Najafi
中科院分区：
文献类型：
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作者：
A. Ortiz;Lennart Bamberg;A. Najafi
在过去的二十年中，非常深的亚微米和纳米技术的出现提高了片上互连架构的重要性。如今，互连对整体芯片功耗、性能和可靠性的影响非常严重，因此需要在所有抽象级别上进行优化。这项工作讨论了使用编码策略来降低能耗并提高片上互连的性能。尽管有一些显着的例子表明通过编码对通信架构进行了根本性的改进，但新技术和更复杂系统的出现正在给该领域带来重要的挑战。在这种情况下，我们手稿的目的是双重的：首先，对文献中现有的编码技术进行回顾；其次，提供一系列具有挑战性的问题，其解决方案有可能显着推进当前的技术水平。如果可能的话，我们会调查有希望的方法来解决这些问题。
During the last two decades, the advent of very deep sub-micron and nanometric technologies has increased the criticality of the on-chip interconnect architecture. Today, interconnects are affecting the overall chip power consumption, performance and reliability so severely that they need to be optimized at all the abstraction levels. This work discusses the use of coding strategies to reduce the energy consumption and improve the performance of on-chip interconnects. Although there are notable examples of the radical improvements in the communication architecture through coding, the appearance of new technologies and more complex systems is raising important challenges in the field. In this context, the aim of our manuscript is double: first, to provide a review of the existing coding techniques in the literature; and second, to provide a set of challenging problems, whose solution has the potential to advance significantly the current state of the art. When possible, we survey promising approaches to tackle those problems.