Reprogrammable logic in memristive crossbar for in-memory computing
Reprogrammable logic in memristive crossbar for in-memory computing
复制标题
用于内存计算的忆阻交叉开关中的可重编程逻辑
DOI：
10.1088/1361-6463/aa9646
复制
发表时间：
2017-12-20
影响因子：
3.4
通讯作者：
Miao, Xiang-Shui
中科院分区：
文献类型：
--
作者：
Cheng, Long;Zhang, Mei-Yun;Miao, Xiang-Shui
忆阻状态逻辑已经成为一个有前途的下一代内存计算范例，以解决传统冯诺依曼架构中不断升级的计算性能压力。在这里，我们提出了一种非易失性可重编程逻辑方法，可以处理不同的行和列之间的忆阻交叉阵列的材料蕴涵（IMP）逻辑的基础上的数据。任意布尔逻辑可以用在交叉杆阵列中包含四个忆阻器的可重编程单元来执行。在所制作的Ti/HfO 2/W忆阻阵列中，实现了通用NAND逻辑和数据传输等基本功能。此外，利用8个忆阻器组成2 × 4阵列，理论上设计了一个1位全加器，并通过仿真验证了该方法在复杂计算任务中的可行性。此外，还讨论了与逻辑相关的一些关键性能，如数据处理的灵活性、级联问题和误码率。这种方法可以是一个进步，在开发基于IMP的忆阻非易失性逻辑的大规模内存计算架构。
Memristive stateful logic has emerged as a promising next-generation in-memory computing paradigm to address escalating computing-performance pressures in traditional von Neumann architecture. Here, we present a nonvolatile reprogrammable logic method that can process data between different rows and columns in a memristive crossbar array based on material implication (IMP) logic. Arbitrary Boolean logic can be executed with a reprogrammable cell containing four memristors in a crossbar array. In the fabricated Ti/HfO2/W memristive array, some fundamental functions, such as universal NAND logic and data transfer, were experimentally implemented. Moreover, using eight memristors in a 2 × 4 array, a one-bit full adder was theoretically designed and verified by simulation to exhibit the feasibility of our method to accomplish complex computing tasks. In addition, some critical logic-related performances were further discussed, such as the flexibility of data processing, cascading problem and bit error rate. Such a method could be a step forward in developing IMP-based memristive nonvolatile logic for large-scale in-memory computing architecture.