8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package

8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package
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8.1 Lakefield 和移动计算:采用 12×12mm2、1mm 层叠封装的 3D 堆叠 10nm 和 22FFL 混合处理器系统

DOI:
10.1109/isscc19947.2020.9062957
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发表时间:
2020
期刊:
2020 IEEE International Solid- State Circuits Conference - (ISSCC)
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通讯作者:
R. Kumar
R. Kumar
中科院分区:
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文献类型:
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作者:
Wilfred Gomes;Sanjeev Khushu;D. Ingerly;P. Stover;Nasirul Chowdhury;F. O’Mahony;A. Balankutty;Noam Dolev;Martin G. Dixon;Lei Jiang;Surya Prekke;B. Patra;P. Rott;R. Kumar

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莱克菲尔德处理器将异构3D芯片堆叠(也称为Foveros)与混合计算相结合,以实现一类新的小型移动的产品。图8.1.1显示了堆叠芯片和采用PoP存储器的3D封装的实现。计算芯片采用英特尔10纳米+技术,以实现功率性能,包括CPU、GPU、伊普、内存和基于Icelake产品系列IP的显示引擎。它包括一个Core™和四个Atom™内核,采用混合配置,使用缓存一致性结构连接。这两种内核类型都暴露给操作系统,操作系统根据工作负载的性能和功耗特性选择最佳内核。内存子系统支持4×16配置的LPDDR 4X PoP。基础芯片采用Intel 22 FFL,包含PCIe Gen 3、USB type-C、存储、音频和传感器集线器等芯片组功能。在3D中结合10 nm和22 FFL可实现大动态范围的性能和功率模式。3D芯片与称为Foveros芯片接口(FDI)的低功耗芯片间I/O通信。与以前相比,功率传输已进行优化,以利用基于PMIC的功率传输,从而实现低功耗和小尺寸。
The Lakefield processor combines heterogeneous 3D die stacking also called Foveros, with hybrid computing to enable a new class of small form factor mobile products. The stacked die and implementation of the 3D package with PoP memory is shown in Fig. 8.1.1. The compute die is on Intel 10nm+ for power-performance and includes the CPU, GPU, IPU, memory and display engine based on IP from the Icelake product family. It includes one Core™ and four Atom™ cores in a hybrid configuration connected using a cache-coherent fabric. Both core types are exposed to the operating system which selects the best core depending on the performance and power characteristics of the workload. The memory subsystem supports LPDDR4X PoP in a 4×16 configuration. The base die is on Intel 22FFL and contains the chipset functionality including PCIe Gen3, USB type-C, storage, audio and a sensor hub. Combining 10nm and 22FFL in 3D enables a large dynamic range of performance and power modes. The 3D dies communicate with a low-power inter-die I/O called the Foveros Die Interface (FDI). The power delivery has been optimized to leverage a PMIC-based power delivery compared to previous to reach the low power and small form factors.