Synthesizing JIT Compilers for In-Kernel DSLs
Synthesizing JIT Compilers for In-Kernel DSLs
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DOI：
10.1007/978-3-030-53291-8_29
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发表时间：
2020-06-16
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影响因子：
--
通讯作者：
Torlak E
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文献类型：
--
作者：
Van Geffen J;Nelson L;Dillig I;Wang X;Torlak E
现代操作系统允许用户空间应用程序通过使用内核域特定语言（DSL）提交内核执行代码。应用程序使用这些DSL来自定义系统策略并添加新功能。为了进行性能，内核通过及时（JIT）汇编执行它们。这些JIT的正确性对于内核的安全性至关重要：内核中的错误导致了许多关键问题和补丁。
本文介绍了Jitsynth，这是为内核DSL合成经过验证的JIT的第一个工具。 Jitsynth作为源DSL和目标指令集体系结构的输入解释器。鉴于这些解释者以及从源到目标状态的映射，Jitsynth将验证的JIT编译器从源到目标综合。我们的关键思想是将此综合问题提出为综合抽象寄存器机器的每个教学编译器之一。我们的核心技术贡献是一种新的编译器Metasketch，它使Jitsynth能够有效探索所得的合成搜索空间。为了评估Jitsynth，我们使用它来合成从EBPF到RISC-V的JIT，并与最近开发的Linux JIT进行比较。合成的JIT避免了Linux JIT中的所有已知错误，并且生成代码的性能平均放缓。我们还使用jitsynth合成两个其他源目标对。结果表明，Jitsynth提供了一种有前途的新方法，可以为内核DSL开发经过验证的JIT。
Modern operating systems allow user-space applications to submit code for kernel execution through the use of in-kernel domain specific languages (DSLs). Applications use these DSLs to customize system policies and add new functionality. For performance, the kernel executes them via just-in-time (JIT) compilation. The correctness of these JITs is crucial for the security of the kernel: bugs in in-kernel JITs have led to numerous critical issues and patches. This paper presents JitSynth, the first tool for synthesizing verified JITs for in-kernel DSLs. JitSynth takes as input interpreters for the source DSL and the target instruction set architecture. Given these interpreters, and a mapping from source to target states, JitSynth synthesizes a verified JIT compiler from the source to the target. Our key idea is to formulate this synthesis problem as one of synthesizing a per-instruction compiler for abstract register machines. Our core technical contribution is a new compiler metasketch that enables JitSynth to efficiently explore the resulting synthesis search space. To evaluate JitSynth, we use it to synthesize a JIT from eBPF to RISC-V and compare to a recently developed Linux JIT. The synthesized JIT avoids all known bugs in the Linux JIT, with an average slowdown of in the performance of the generated code. We also use JitSynth to synthesize JITs for two additional source-target pairs. The results show that JitSynth offers a promising new way to develop verified JITs for in-kernel DSLs.
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