Implications of Memory Interference for Composed HPC Applications
Implications of Memory Interference for Composed HPC Applications
复制标题
内存干扰对组合 HPC 应用程序的影响
DOI：
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
J. Lange
中科院分区：
文献类型：
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作者：
Brian Kocoloski;Yuyu Zhou;B. Childers;J. Lange
对于大规模高性能计算（HPC）应用而言，节点间I/O和数据移动的成本变得越来越高昂。这一趋势导致了原位组合应用的出现，即多个组件位于同一节点上。然而，这些组件可能会争夺底层内存系统资源。在这份扩展的研究摘要中，我们对内存层次结构中共享资源（包括末级缓存（LLC）和DRAM带宽）争用的影响进行了初步评估。我们表明，即使是适度的内存争用水平也可能对某些基准测试产生重大的性能影响，并主张在未来的HPC系统上采用跨层方法进行资源划分和调度。
The cost of inter-node I/O and data movement is becoming increasingly prohibitive for large scale High Performance Computing (HPC) applications. This trend is leading to the emergence of composed in situ applications that co-locate multiple components on the same node. However, these components may contend for underlying memory system resources. In this extended research abstract, we present a preliminary evaluation of the impacts of contention for shared resources in the memory hierarchy, including the last level cache (LLC) and DRAM bandwidth. We show that even modest levels of memory contention can have substantial performance implications for some benchmarks, and argue for a cross layer approach to resource partitioning and scheduling on future HPC systems.