A Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits
A Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits
复制标题
超导单通量量子电路的统计静态时序分析工具
DOI：
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
M. Pedram
中科院分区：
文献类型：
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作者：
Bo Zhang;Fangzhou Wang;S. Gupta;M. Pedram
超导单通量量子（SFQ）技术作为一种超CMOS技术，具有处理速度快、能量效率高等优点。随着SFQ电路复杂度的不断提高，如何在工艺变化的情况下准确、快速地估计出SFQ电路的工作时钟周期变得越来越迫切。然而，由于物理参数的空间相关性和定时参数（传播延迟、建立时间和保持时间）的非正态分布，最小可工作时钟周期的估计是困难的。因此，一个好的统计时序分析（SSTA）工具SFQ电路是必要的。本文提出了一种基于Bootstrap的统计静态时序分析工具qSSTA。在一定的相关性规范下，qSSTA通过从所有门的离散采样空间执行大量的自举迭代，可以合理地估计出最小可工作时钟周期。通过应用路径修剪方法，qSSTA跳过不重要路径上的计算，从而减少运行时间和内存。实验结果表明，重要路径的大小可以很小。在16位整数分频器的19114路中，只有73路对估计最小可工作时钟周期是重要的。我们只需要84.21秒来运行10，000次迭代。
As a beyond-CMOS technology, superconducting single-flux-quantum (SFQ) technology promises fast processing speed and excellent energy efficiency. With the increasing complexity of SFQ circuits, the accurate and fast estimation of the workable clock period under process variation becomes more urgent. However, the estimation of the minimum workable clock period is difficult due to the spatial correlation of physical parameters and the non-normal distribution of timing parameters (propagation delay, setup time, and hold time). Therefore, a good statistical timing analysis (SSTA) tool for SFQ circuits is necessary. This paper presents a bootstrap-based statistical static timing analysis tool called qSSTA. qSSTA can reasonably estimate a minimum workable clock period by executing a large amount of bootstrap iterations from the discrete sampling spaces of all gates under a certain correlation specification. By applying path pruning methods, qSSTA skips the calculations on unimportant paths and hence reduce run time and memory. Experimental results show that the size of important paths could be small. Among 19114 paths of the 16-bit integer divider, only 73 paths are important to estimate minimum workable clock period. We only need 84.21 seconds to run 10,000 iterations.