An optically differential reconfigurable gate array with a dynamic reconfiguration circuit
An optically differential reconfigurable gate array with a dynamic reconfiguration circuit
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具有动态重构电路的光学差分可重构门阵列
DOI：
10.1109/ipdps.2003.1213349
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发表时间：
2003
期刊：
影响因子：
--
通讯作者：
F. Kobayashi
中科院分区：
文献类型：
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作者：
Minoru Watanabe;F. Kobayashi
提出了一种采用动态电路技术的光差分可重构门阵列(ODRGA)，以减小VLSI芯片上配置电路占用的面积。通过计算存储在VLSI芯片上的先前配置数据与随后光学提供的配置数据之间的差值来执行ODRGA重新配置过程。我们以前提出的使用静态电路技术的ODRGA的重构电路需要很大的实现面积。本文介绍了一种新的动态重构电路，并将其在VLSI芯片上的面积估计与静态技术得到的面积进行了比较。
An optically differential reconfigurable gate array (ODRGA) using a dynamic circuit technique is proposed to reduce the area occupied by the configuration circuit on a VLSI chip. The ODRGA reconfiguration process is performed by calculating the difference between previous configuration data stored on a VLSI chip and subsequent optically-supplied configuration data. The reconfiguration circuit of our previously proposed ODRGA using static circuit techniques required a large implementation area. This paper introduces a new dynamic reconfiguration circuit and compares an estimate of its area on the VLSI chip with that obtained by the static technique.