A 0.18 μm CMOS current reuse ultra-wideband low noise amplifier (UWB-LNA) with minimized group delay variations
A 0.18 μm CMOS current reuse ultra-wideband low noise amplifier (UWB-LNA) with minimized group delay variations
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DOI：
10.1109/eumc.2014.6986705
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发表时间：
2014-12
期刊：
影响因子：
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通讯作者：
K. Yousef;H. Jia;R. Pokharel;A. Allam;M. Ragab;H. Kanaya
中科院分区：
文献类型：
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作者：
K. Yousef;H. Jia;R. Pokharel;A. Allam;M. Ragab;H. Kanaya
本文设计了一种具有最小群延迟变化和优化噪声性能的CMOS低噪声放大器，用于超宽带应用。提出的LNA采用基于当前重用拓扑的公共源。通过这种配置，获得的增益平坦度为12.25±0.25，噪声系数（NF）小于3.8 dB。该LNA采用标准的0.18 μm CMOS技术，可实现±25 ps的群延迟变化。在整个输入级采用弱容阻并联反馈技术实现宽带输入匹配。群延迟变化优化采用输出电阻端接串峰。该UWB LNA在5.5 GHz时具有1dB测量压缩点（P1dB）和-7.0 dBm和2.5 dBm的输入三阶互调点（IIP3）。实现的UWB LNA芯片面积仅为560 μm × 590 μm。
This paper presents the design of a CMOS low noise amplifier (LNA) with minimized group delay variations and optimized noise performance for ultra-wideband (UWB) applications. The proposed LNA employs a common source based current reuse topology. Through this configuration gain flatness of 12.25± 0.25 with noise figure (NF) less than 3.8 dB are achieved. This LNA achieves group delay variation of ±25 ps using the standard 0.18 μm CMOS technology. Weak Capacitive-Resistive shunt feedback technique is implemented across the input stage for wideband input matching. Series peaking with output resistive termination are adopted for group delay variations optimization. This UWB LNA has a measured 1dB compression point (P1dB) and an input third-order intermodulation point (IIP3) of -7.0 dBm and 2.5 dBm respectively at 5.5 GHz. The implemented UWB LNA chip area is only 560 μm × 590 μm.