FPGA-based Acceleration of Time Series Similarity Prediction: From Cloud to Edge
FPGA-based Acceleration of Time Series Similarity Prediction: From Cloud to Edge
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DOI：
10.1145/3555810
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发表时间：
2022-08
影响因子：
2.3
通讯作者：
Amin Kalantar;Zachary Zimmerman;P. Brisk
中科院分区：
文献类型：
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作者：
Amin Kalantar;Zachary Zimmerman;P. Brisk
随着低成本传感器和物联网的普及，产生数据的速度远远超过了当今基础设施的计算和存储能力。这些数据大多采用时间序列的形式，作为回应，在过去十年中，随着开发和部署新的分析方法来处理数据，人们对创建时间序列档案的兴趣越来越大。一般策略是将多个相似性搜索机制应用于时间序列数据的各种子集和子序列，以识别重复模式和异常；然而，这些方法的计算需求使得它们与当今功率受限的嵌入式cpu不兼容。为了解决这一挑战，我们提出了FA-LAMP，这是一种fpga加速实现的学习近似矩阵轮廓（LAMP）算法，该算法预测实时采样的流数据与用于训练的代表性时间序列数据集之间的相关性。FA-LAMP可以作为时间序列分析问题（如分类）的实时解决方案。我们介绍了FA-LAMP在基于边缘和基于云的原型上的实现。在边缘设备上，FA-LAMP尽可能靠近物联网传感器集成加速计算，从而消除了在云中传输和存储数据以进行后验分析的需要。在基于云的加速器上，FA-LAMP可以在同一板上执行多个LAMP模型，允许同时处理来自网络上多个数据源的传入数据。LAMP采用卷积神经网络（CNN）进行预测。本研究探讨了使用Xilinx深度学习处理器单元（DPU）和Vitis AI开发环境在fpga上部署cnn的挑战和局限性。我们揭示了DPU的几个技术限制，同时提供了一种机制，通过将自定义IP块加速器附加到架构中来克服它们。我们使用低成本的Xilinx Ultra96-V2 FPGA和基于云的Xilinx Alveo U280加速卡对FA-LAMP进行了评估，并针对在Raspberry Pi 3、Edge TPU、GPU、桌面CPU和服务器级CPU上运行的原型LAMP部署测量了它们的性能。在边缘场景下，与Raspberry Pi相比，Ultra96-V2 FPGA提高了性能和能耗；云场景下，服务器CPU和GPU性能优于Alveo U280加速卡，桌面CPU性能相当；然而，与其他四个平台相比，Alveo卡的能耗降低了一个数量级。我们的实现可以在https://github.com/aminiok1/lamp-alveo上公开获得。
With the proliferation of low-cost sensors and the Internet of Things, the rate of producing data far exceeds the compute and storage capabilities of today’s infrastructure. Much of this data takes the form of time series, and in response, there has been increasing interest in the creation of time series archives in the past decade, along with the development and deployment of novel analysis methods to process the data. The general strategy has been to apply a plurality of similarity search mechanisms to various subsets and subsequences of time series data to identify repeated patterns and anomalies; however, the computational demands of these approaches renders them incompatible with today’s power-constrained embedded CPUs. To address this challenge, we present FA-LAMP, an FPGA-accelerated implementation of the Learned Approximate Matrix Profile (LAMP) algorithm, which predicts the correlation between streaming data sampled in real-time and a representative time series dataset used for training. FA-LAMP lends itself as a real-time solution for time series analysis problems such as classification. We present the implementation of FA-LAMP on both edge- and cloud-based prototypes. On the edge devices, FA-LAMP integrates accelerated computation as close as possible to IoT sensors, thereby eliminating the need to transmit and store data in the cloud for posterior analysis. On the cloud-based accelerators, FA-LAMP can execute multiple LAMP models on the same board, allowing simultaneous processing of incoming data from multiple data sources across a network. LAMP employs a Convolutional Neural Network (CNN) for prediction. This work investigates the challenges and limitations of deploying CNNs on FPGAs using the Xilinx Deep Learning Processor Unit (DPU) and the Vitis AI development environment. We expose several technical limitations of the DPU, while providing a mechanism to overcome them by attaching custom IP block accelerators to the architecture. We evaluate FA-LAMP using a low-cost Xilinx Ultra96-V2 FPGA as well as a cloud-based Xilinx Alveo U280 accelerator card and measure their performance against a prototypical LAMP deployment running on a Raspberry Pi 3, an Edge TPU, a GPU, a desktop CPU, and a server-class CPU. In the edge scenario, the Ultra96-V2 FPGA improved performance and energy consumption compared to the Raspberry Pi; in the cloud scenario, the server CPU and GPU outperformed the Alveo U280 accelerator card, while the desktop CPU achieved comparable performance; however, the Alveo card offered an order of magnitude lower energy consumption compared to the other four platforms. Our implementation is publicly available at https://github.com/aminiok1/lamp-alveo.