An Implementation of Fast-Locking and Wide-Range 11-bit Reversible SAR DLL
An Implementation of Fast-Locking and Wide-Range 11-bit Reversible SAR DLL
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DOI：
10.1109/tcsii.2010.2048379
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发表时间：
2010-06
期刊：
影响因子：
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通讯作者：
Lei Wang;Leibo Liu;Hongyi Chen
中科院分区：
文献类型：
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作者：
Lei Wang;Leibo Liu;Hongyi Chen
提出了一种11位可逆逐次逼近寄存器（RSAR）控制的全数字延迟锁定环（DLL）的电路结构，该电路利用RSAR方案中改进的二分搜索算法，在较宽的工作范围内实现自适应带宽。此外，它是快速锁定，因为它找到合适的延迟范围第一和逐次逼近寄存器过程。采用SMIC 0.13 μ m1 P6 M互补金属氧化物半导体（CMOS）工艺，在0.2 × 0.1mm2硅片上实现了RSAR DLL。测试结果表明，该芯片工作频率范围宽（30 MHz ~ 1 GHz），锁定时间小于42个周期，延迟分辨率为10 ps，30 MHz时功耗为1.5 mW。
This brief proposes a novel circuit architecture of an 11-bit reversible successive approximation register (RSAR)controlled all-digital delay-locked loop (DLL), which could achieve adaptive bandwidth in a wide operation range by utilizing the modified binary search algorithm of the RS AR scheme. Moreover, it is fast locking because it finds the suitable delay range first and the successive approximation register process next. The proposed RSAR DLL is fabricated into a 0.2 × 0.1 mm2 silicon with SMIC 0.13-μm 1P6M complimentary metal-oxide-semiconductor technology. Test shows that the chip could work in a wide frequency range from 30 MHz to 1 GHz, with less than 42 cycles lock-in time, 10-ps delay resolution, and 1.5 mW at 30-MHz power dissipation.