AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators
AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators
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DOI：
10.1145/3494534
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发表时间：
2020-09
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通讯作者：
Atefeh Sohrabizadeh;Cody Hao Yu;Min Gao;J. Cong
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作者：
Atefeh Sohrabizadeh;Cody Hao Yu;Min Gao;J. Cong
采用FPGA作为嵌入式计算中心的加速器正在成为定制计算的主流，但FPGA难以编程的事实为软件程序员创造了陡峭的学习曲线。即使在高级综合（HLS）的帮助下，加速器设计人员仍然必须手动执行代码重构和繁琐的参数调整，以实现最佳性能。虽然许多学习模型已经被现有的工作利用来自动化高效加速器的设计，但现代HLS工具的不可预测性成为他们保持高准确性的主要障碍。为了解决这个问题，我们提出了一个自动化的DSE框架AutoDSE-利用一个检查引导的坐标优化系统地找到一个更好的设计点。AutoDSE在每一步都能检测到设计的瓶颈，并专注于高影响参数来克服它。实验结果表明，AutoDSE能够识别出在MachSuite和Rodinia基准测试中实现几何平均19.9倍加速比的设计点。与Xilinx葡萄属库中手动优化的HLS视觉内核相比，AutoDSE可以将其优化杂注减少26.38倍，同时实现类似的性能。由于每个设计平均不到一个优化pragma，我们正在通过使软件程序员能够设计高效的FPGA加速器来实现可定制计算的民主化。
Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized computing, but the fact that FPGAs are hard to program creates a steep learning curve for software programmers. Even with the help of high-level synthesis (HLS), accelerator designers still have to manually perform code reconstruction and cumbersome parameter tuning to achieve optimal performance. While many learning models have been leveraged by existing work to automate the design of efficient accelerators, the unpredictability of modern HLS tools becomes a major obstacle for them to maintain high accuracy. To address this problem, we propose an automated DSE framework—AutoDSE—that leverages a bottleneck-guided coordinate optimizer to systematically find a better design point. AutoDSE detects the bottleneck of the design in each step and focuses on high-impact parameters to overcome it. The experimental results show that AutoDSE is able to identify the design point that achieves, on the geometric mean, 19.9× speedup over one CPU core for MachSuite and Rodinia benchmarks. Compared to the manually optimized HLS vision kernels in Xilinx Vitis libraries, AutoDSE can reduce their optimization pragmas by 26.38× while achieving similar performance. With less than one optimization pragma per design on average, we are making progress towards democratizing customizable computing by enabling software programmers to design efficient FPGA accelerators.