Simultaneous DC Current Balance and Common-Mode Voltage Control With Multilevel Current Source Inverters

Simultaneous DC Current Balance and Common-Mode Voltage Control With Multilevel Current Source Inverters
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DOI:
10.1109/tpel.2018.2790950
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发表时间:
2018-01
影响因子:
6.7
通讯作者:
L. Ding;Y. Li
L. Ding;Y. Li
中科院分区:
工程技术1区
文献类型:
--
作者:
L. Ding;Y. Li

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电流源变换器在大功率中压应用中得到了广泛的应用。为了提高系统的功率容量和降低输出谐波,将具有多电平电流输出的csc并联是一种实用的方法。主要有两种基于并行的配置。每个并联CSC都有独立直流链路的结构可以视为第一种配置,其中流入每个CSC的直流电流可以从整流侧独立控制。第二种类型是在电网侧只有一个电流源整流器(CSR)和负载侧并联电流源逆变器(csi),这可能会降低系统的成本和尺寸。然而,对于一个共同的直流电源,每个CSC的直流电流应该通过适当的调制设计来仔细控制。同时,还应抑制增加电机线路对地电压并对绝缘系统造成额外应力的共模电压(CMV)。本文以共享直流链路结构为重点,对直流链路电流流和共模环路进行了深入分析。我们提出了一种考虑直流电流平衡和减小CMV要求的并联CSI系统的多电平调制策略,以提高系统的整体性能。通过无变压器并联CSC系统的仿真和实验验证了该方法的有效性。
The current source converter (CSC) has been popular in high-power medium-voltage applications. To increase the system power capacity and reduce the output harmonics, parallel connection of CSCs with multilevel current output is a practical approach. There are mainly two types of parallel based configurations. The structure with an independent dc link for each paralleled CSC can be regarded as the first configuration, where the dc current flowing into each CSC can be controlled from the rectifier side independently. The second type is constructed with only one current source rectifier (CSR) on the grid side and paralleled current source inverters (CSIs) on the load side, which could potentially reduce the cost and size of the system. However, with a common dc source, the dc current for each CSC should be carefully controlled with proper modulation design. At the same time, the common-mode voltage (CMV), which increases the motor line-to-ground voltage and causes additional stress to the insulation system, should also be suppressed. In this paper, with a focus on the shared dc-link structure, we thoroughly analyze the dc-link current flow and common-mode loop circuit. We propose a multilevel modulation strategy of the parallel CSI system considering the requirement of dc current balancing and CMV reduction to improve the overall system performance. The effectiveness of the proposed method is verified by both simulation and experiment in a transformerless parallel CSC system.